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24 Appendix: LVDS Reference Cable Pinouts

The following section provides information about reference cable pinouts for commonly used LVDS panels. The information here is provided

based on the manufacturer’s datasheets.

1 2 ... 111 112 113 114 115 116 117 118 119 120 121 ... 133 134

User’s Guide 1
Revision 0.2 (Preliminary) 1
Revision History 2
Disclaimer 3
Intended Audience 3
Lead-Free Designs (RoHS) 3
Copyright Notice 4
Trademarks 4
Warranty 5
Certication 5
Technical Support 6
Terminology 6
Contents 7
1 Safety Instructions 12
2 System Memory Conguration 13
3 Feature Overview conga-IGX 14
3.2 Block Diagram 15
3.3 USB Structure 16
3.4 conga-IGX Variants 17
3.6 Onboard Components 19
Backplate 20
Caution 21
(SATA connectors) 22
5 Display Options 23
Backlight Inverter 24
Integrated Backlight 24
5.3 LVDS Connector details 25
DC DVI-I DisplayPort 26
COM1 COM2 26
LVDS Mode: 29
(LVDS tool) 29
5.6 LVDS Tool 32
5.7 LVDS Cabling Reference 33
5.8 Dual-DVI Output 34
5.9 VGA Output 35
5.10 DVI or VGA plus LVDS 36
6.4 Drive Power Connector 41
Drive Power 42
Front Panel 42
7 Internal Connectors 43
7.2 Internal USB 2.0 Ports 44
7.3 Internal USB 3.0 Ports 45
High Denition Audio: 46
Legacy Audio (AC97): 46
7.6 m-SATA / SATA 47
7.7 Mini-PCIe Connector 48
PCIe x4 (Gen2) 49
7.11 Intrusion Connector 50
7.12 Fan Connector 51
7.13 Front Panel Connector 52
8 System Monitoring 53
8.2 conga-IGX Sensors 54
8.3 SilentFanCongManager 55
9 Power Consumption 58
10 Operating System Support 59
11 conga-IGX Tools 60
12 Miscellaneous 61
OS Watchdog 62
13.2 Graphics Memory 63
13.3 AMD “Eyenity” Support 63
13.4 HDMI Audio Support 63
14 Introduction 65
15 Navigating BIOS Setup 67
15.2 Navigating BIOS Setup 68
15.3 Exiting BIOS Setup 68
Main Menu – System functions 69
16.1.3 Processor Details 70
16.1.4 Memory MemoDetails 70
16.2 System Language 71
16.3 System Date/System Time 71
16.4 Access Level 71
17.1.1 TPM Support 73
17.1.2 TPM State 73
17.1.3 Pending TPM operation 73
17.2 SATA Conguration 74
17.3 Graphics Conguration 75
17.4 LVDS Conguration 75
17.4.1 LVDS Support 76
17.4.3 Non-EDID Support 76
17.4.4 LVDS Mode 76
17.4.5 LVDS Channel Swap 77
17.5 USB Conguration 78
17.6 USB Port Security 79
17.7 System Monitoring 80
17.7.3 Chassis Type 81
17.7.4 TCV Version 81
17.7.5 Fan Control 81
17.7.6 Fan2 Wiring 82
17.8.1 Audio Conguration 82
17.9 Super IO Conguration 83
17.10.2 Device Settings 84
17.10.3 Change Settings 84
17.11.1 Serial Port 85
17.11.2 Device Settings 85
17.11.3 Change Settings 85
17.12.1 Parallel Port 86
17.12.2 Device Settings 86
17.12.3 Change Settings 86
17.12.4 Device Mode 86
17.13 Network Stack 87
18.1 Password Description 88
18.2 Administrator Password 89
18.3 User Password 89
18.4 User Password on Boot 90
18.5 Cabinet Monitoring 90
18.6 Skip Password on WOL 90
18.7 FLASH Write 90
18.8 Secure Boot 91
18.8.4 Secure Boot Mode 92
18.8.5 Key Management 92
Append Var to DB 94
18.10 HDD n / HDD-ID 95
19.1 Power Settings 97
19.1.2 Power On Source 98
19.1.3 Low Power Soft Off 98
19.2 Wake-Up Resources 99
19.2.8 Wake Up Day 101
19.2.9 USB Keyboard 101
Display of the Event Log 102
20.1.6 METW 103
20.1.2 Erase Event Log 103
20.1.3 When Log is full 103
20.1.4 Log System Boot Event 103
20.1.5 MECI 103
20.1.7 Log OEM Codes 104
20.1.8 Convert OEM codes 104
20.1.9 View SMBIOS Event Log 104
21 Boot Menu – System boot 105
21.1 Boot Conguration 106
21.1.3 Fast On 107
21.1.4 USB Support 107
21.1.5 PS2 Devices Support 108
21.1.6 POST Errors 108
21.1.8 Boot Removable Media 108
21.1.9 Virus Warning 109
21.1.10 Prefer USB Boot 109
21.1.12 CSM Conguration 110
22.1 Save Changes and Exit 112
22.3 Save Changes and Reset 113
22.5 Save Options 113
22.6 Boot Override 114
23 BIOS Update 115
Signal Symbol Pin Pin Symbol 117
24.1.2 Inverter Cable Plan 118
Signal Symbol Pin Pin Symbol 119
Pin Signal Name Description 119
24.2.2 Inverter Cable Plan 120
Pin Signal Name Description 121
24.3.2 Inverter Cable Plan 122
24.4.2 Inverter Cable Plan 124
24.5.2 Inverter Cable Plan 126
24.6.3 Inverter Cable Plan 128
24.7.2 Inverter Cable Plan 130
24.8.2 Inverter Cable Plan 132
24.9.2 Inverter Cable Plan 134

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